This invention relates to a method of manufacturing semiconductor devices, and more particularly semiconductor devices having multi-layer lead conductors formed by electro chemical plating process.
The prior art devices are disclosed, for example, on "Multilevel Gold Metallization" by K. Haberle et al in a paper of V-MIC Conf. Jun. 13-12, 1988, and on "A Process for Two-Layer Gold IC Metallization" by D. Summers in Solid State Technology/December 1983.
In a heretofore used method of manufacturing these semiconductor devices,
(p-a) a silicon substrate is covered with an oxide film, PA0 (p-b) a film of TiW is sputtered on the oxide film, PA0 (p-c) a film of Au is sputtered on the TiW film, PA0 (p-d) a photoresist pattern is formed on superimposed films of TiW and Au, PA0 (p-e) Au is plated by electro chemical plating process on the lower conductor base pattern to form lower layer lead conductors, two films of TiW and Au being etched with the plated Au as the mask, PA0 (p-f) silicon impregnated polyimide (PSI) as an insulating layer, is painted on the Whole surface of the substrate. PA0 (p-g) Through holes for through connections are formed in the PSI layer, each through hole reaching a surface of the lower layer lead conductors, PA0 (p-h) upper conductor base pattern of TiW film and Au film are formed on the surface of the PSI layer including side walls of the through holes, PA0 (p-i) upper layer lead conductors and through connections are electro chemically plated on patterned TiW and Au films.
There are problems in semiconductor devices thus fabricated. A first problem is unevenness of the surface of PSI layer where upper conductor base patterns are formed. This unevenness is caused by a height of the lower layer lead conductors from the oxide film of the silicon substrate.
The surface of the PSI layer on the lower layer lead conductors naturally becomes higher than that on the oxide film. This unevenness of the PSI surface is accumulated with number of layers, and when this unevenness exceeds the focal depth of an optical instrument for exposure in patterning photoresist film, patterning is degraded and yield rate of the semiconductor devices is lowered.
A second problem is in the reliability of the through connections. In the above mentioned process of fabrication, electrochemical plating of a through connection grows from a bottom Au film and from a side-wall Au film. When the growth from the side-wall Au film is fast, the opening of the through hole becomes small by the growth of plating around the opening. This smallness of the opening clogs up electrolytic solution to enter in lower parts of the through hole. As a result, air holes (or an air hole) are included in the through connection. It is apparent that this air hole is a problem in reliability.